COURSE OUTLINE

Recent trends in extreme miniaturization of electronic systems requires either innovation in energy efficiency and/or increase the energy available to the system. Applications include mobile devices, biomedical electronics, Internet of Everything (IoE), wearables, power management integrated circuits, and beyond.

In most such applications, size and battery life are critically important metrics. Since battery technology is scaling too slowly to meet emergent needs, there is a demand to attain enabling levels of miniaturization through the development of novel energy-efficient microelectronics, energy harvesting technologies, as well as to develop innovative new sensor/actuator technologies.

This comprehensive course will investigate these challenges & trade-offs and takes the participants on a journey of understanding the art of subthreshold analog design for energy-efficient integrated circuits with a focus on ultra-low-power analog, mixed-signal, wireless, and power management circuits that are enabling our connected world.

The course will begin with a refresher on subthreshold design, and will discuss the design of ultra-low-power building blocks such as reference generators, amplifiers and oscillators. We will use these building blocks to then describe how to build sensor interfaces, including for temperature, electrochemistry, and electrophysiology. We will culminate this part of the course with a deep dive into instrumentation amplifiers, and a discussion of low-power ADC design techniques.

Next, we will shift focus to discuss low-power techniques for wireless transceivers, including LNAs, power amplifiers, and wireless system architectures, all the way to ultra-low-power wake-up receivers and Wi-Fi and Bluetooth-compatible backscatter circuits.

Low-jitter frequency generation at low power remains a great challenge in wireless, wireline, and digital systems. Power-efficient VCO and PLL design techniques will be discussed towards optimizing jitter/power trade-offs.

Finally, we will wrap up with a review of efficiency power management converters, starting with low-power buck converters, switched-capacitor converters, and hybrid converters. Energy harvesting will also be discussed.

Each exciting lecture will consist of a standard presentation (including open Q&A) followed by walk-through design examples and, when possible, demo simulation test-benches for specific sub-blocks. A public-domain PDK will also be shared with the course participants to explore with a circuit simulator of their choice.

For each lecture, participants will receive optional homework assignments with mathematical/calculation questions and/or thought-provoking questions to encourage them to apply their understanding and experience, thereby further enhancing the learning beyond the lecture material.

The course is primarily intended for analog design engineers and postgraduate research students familiar with analog IC design fundamentals and wish to learn the subthreshold circuit design techniques for low-power and/or energy-efficiency applications.