Dates: 11th/14th/18th/21st/25th/28th/1st/4th Jan./Feb. 2022
Live-Virtual Zoom Lectures
Dates: 11th/14th/18th/21st/25th/
28th/1st/4th Jan./Feb. 2022
Live-Virtual Zoom Lectures
Recent years have seen a tremendous growth in mmW integrated systems in CMOS. The advances of the fT & fMAX of CMOS have enabled the integration of complete mmW systems into Silicon, resulting in a reduction of production cost, leading to a widespread market adoption of many mmW products, such as automotive radar & mmW 5G/6G communication.
CMOS is in the first place optimized and tailored for digital integration. Achieving analog performance at mmW frequencies is not trivial and requires a thorough understanding of transistor parasitics and layout limitations on one hand, and system-level requirements on the other hand. Compared to MMIC design in III/V the availability of many metal layers in CMOS allows novel mmW components which are not available in III/V.
Integrating mmW circuits in CMOS are only meaningful if an entire SOC is aimed for. This also comes with several challenges, such as unwanted coupling between circuits and ground loops, while at the same time allowing additional (digital) control of the front-end circuits.
This comprehensive course will investigate these challenges & trade-offs and takes the participants on a journey of understanding mmW circuits. Starting at system level requirements, going all the way down to layout optimization and passive components with in-depth discussion of various building blocks & design examples including techniques for area & power-efficient designs. Towards the end of the course, common design, layout & measurement errors are discussed as well as an outlook for future mmW & THz systems.
Duration: 16 hours
Format: 8 ‘Live-Virtual’ sessions, scheduled over a 4-week period, with twice-weekly, 2-hour lectures including interactive Q&A.
Work:Â Homework assignments (optional) will consolidate the learning from the lectures.
Included: Course notes (PDF), homework assignments (PDF), lecture recordings* (up to 12 months playback), class discussion forum (offline Q&A) and attendance certificate.
*Facilitates the opportunity to catch-up with missed lecture(s) due to time-zone difference, work deadlines, etc. or simply to review the lecture recording(s) at your own pace and convenience.
Fees:
Flash Sale: €475 (6th-19th Dec. 2021)
Standard: €635 (From 20th Dec. 2021)
For registration, more information or subscription to our newsletter
Duration: 16 hours
Format: 8 ‘Live-Virtual’ sessions, scheduled over a 4-week period, with twice-weekly, 2-hour lectures including interactive Q&A.
Work:Â Homework assignments (optional) will consolidate the learning from the lectures.
Included: Course notes (PDF), homework assignments (PDF), lecture recordings* (up to 12 months playback), class discussion forum (offline Q&A) and attendance certificate.
*Facilitates the opportunity to catch-up with missed lecture(s) due to time-zone difference, work deadlines, etc. or simply to review the lecture recording(s) at your own pace and convenience.
Fees:
Flash Sale: €475 (6th-19th Dec. 2021)
Standard: €635 (From 20th Dec. 2021)
For registration, more information or subscription to our newsletter
11th Jan. 2022
Lecture #1 – Circuit–Level Challenges of mmW Systems
5G/6G, mmW, beamforming, radar, phased arrays. Linearity, gain, efficiency, output power.
14th Jan. 2022
Lecture #2 – CMOS Transistors at mmW
FOM for HF operation (fT, fMAX, MSG, GMAX), limitations of MOSFET, layout, neutralisation.
18th Jan. 2022
Lecture #3 – CMOS Passives at mmW & Transformer-based mmW Design.
Optimizing passives, on–chip & slow-wave TL, transformers, tech comparison, stability, diff. CMOS IC.
21st Jan. 2022
Lecture #4 – Design & Implementation of mmW CMOS Building Blocks
mmW CMOS blocks for Tx/Rx: LNA, mixers, VCOs, dividers. Examples in 16nm, 28nm & 40nm CMOS.
25th Jan. 2022
Lecture #5 – Design & Implementation of mmW CMOS PAs
mmW PAs (20GHz-160GHz). Class AB, Doherty, outphasing, polar. Stability. Common mistakes.
28th Jan. 2022
Lecture #6 – Things you won’t find in the handbook: Common Errors
Stability, decoupling & bypass caps, layout, coupling effects, good practices, measurement flaws.
1st Feb. 2022
Lecture #7 – Polymer Microwave Fibers: Merging mmW, Wireline & Optical
Dielectric waveguides. System architectures. 40nm & 28nm examples with >10Gbps over >10meters.
4th Feb. 2022
Lecture #8 – THz in CMOS
MOSFET >fMAX. Rectification & injection locking. Harmonic operation. 40nm & 28nm for 410-600GHz.
Patrick Reynaert was born in Wilrijk, Belgium, in 1976. He received the Master of Industrial Sciences in Electronics (ing.) from the Karel de Grote Hogeschool, Antwerpen, Belgium in 1998 and both the Master of Electrical Engineering (ir.) and the Ph.D. in Engineering Science (dr.) from the University of Leuven (KU Leuven), Belgium in 2001 and 2006 respectively.Â
During 2006-2007, he was a post-doctoral researcher at the Department of Electrical Engineering and Computer Sciences of the University of California at Berkeley, with the support of a BAEF Francqui Fellowship. During the summer of 2007, he was a visiting researcher at Infineon, Villach, Austria.
Since October 2007, he is a Professor at the University of Leuven (KU Leuven), department of Electrical Engineering (ESAT-MICAS). His main research interests include mm-wave and THz CMOS circuit design, high-speed circuits and RF power amplifiers.
Dr. Reynaert is a Senior Member of the IEEE and chair of the IEEE SSCS Benelux Chapter. He serves or has served on the technical program committees of several international conferences including ISSCC, ESSCIRC, RFIC, PRIME and IEDM. He has served as Associate Editor for Transactions on Circuits and Systems – I, and as Guest Editor for the Journal of Solid-State Circuits.Â
He received the 2011 TSMC-Europractice Innovation Award, the ESSCIRC-2011 Best Paper award and the 2014 2nd Bell Labs Prize.