COURSE OUTLINE

Recent years have seen a tremendous growth in mmW integrated systems in CMOS. The advances of the fT & fMAX of CMOS have enabled the integration of complete mmW systems into Silicon, resulting in a reduction of production cost, leading to a widespread market adoption of many mmW products, such as automotive radar & mmW 5G/6G communication.

CMOS is in the first place optimized and tailored for digital integration. Achieving analog performance at mmW frequencies is not trivial and requires a thorough understanding of transistor parasitics and layout limitations on one hand, and system-level requirements on the other hand. Compared to MMIC design in III/V the availability of many metal layers in CMOS allows novel mmW components which are not available in III/V.

Integrating mmW circuits in CMOS are only meaningful if an entire SOC is aimed for. This also comes with several challenges, such as unwanted coupling between circuits and ground loops, while at the same time allowing additional (digital) control of the front-end circuits.

This comprehensive course will investigate these challenges & trade-offs and takes the participants on a journey of understanding mmW circuits. Starting at system level requirements, going all the way down to layout optimization and passive components with in-depth discussion of various building blocks & design examples including techniques for area & power-efficient designs. Towards the end of the course, common design, layout & measurement errors are discussed as well as an outlook for future mmW & THz systems.